As background for our invention, current practice for fuses on chips normally requires the use of a single I/O pad per each fuse used on a chip. This is done to accomodate the high currents and voltages needed to blow the fuses reliably. This method is costly because it consumes a high number of I/O pads, which severely decreases the number of I/O's pads available for chip functionality. As chip densities increase, this reduction is no longer acceptable.